圈內分享：基于PCI數據采集卡的高速多通道數據采集系統
摘 要： 針對數(shu)(shu)據(ju)采(cai)集(ji)系(xi)統(tong)(tong)設計要(yao)求具(ju)有精度高、速(su)度快、路(lu)數(shu)(shu)多的(de)特點，根據(ju)成(cheng)本要(yao)求，采(cai)用DAQ-2010數(shu)(shu)據(ju)采(cai)集(ji)卡(ka)和(he)(he)CPLD等(deng)硬件完成(cheng)了(le)(le)測試系(xi)統(tong)(tong)的(de)搭建工(gong)作(zuo)，介紹了(le)(le)系(xi)統(tong)(tong)的(de)工(gong)作(zuo)原(yuan)理和(he)(he)開(kai)發思路(lu)，描述了(le)(le)系(xi)統(tong)(tong)軟件的(de)開(kai)發和(he)(he)功能。在實際應(ying)用中整個系(xi)統(tong)(tong)穩定可(ke)靠，取(qu)得了(le)(le)良(liang)好效果(guo)。
0 引言
近年(nian)來，隨著航空、航天、測控等技術的(de)迅速(su)(su)發展，相關行(xing)業對(dui)數(shu)據(ju)采(cai)(cai)(cai)集(ji)系(xi)統的(de)性(xing)能(neng)要(yao)求更(geng)加苛刻，要(yao)求能(neng)夠(gou)同(tong)時采(cai)(cai)(cai)樣(yang)(yang)的(de)通(tong)道更(geng)多(duo)，采(cai)(cai)(cai)樣(yang)(yang)的(de)精度(du)(du)和(he)速(su)(su)度(du)(du)要(yao)求更(geng)高(gao)，因(yin)此研制開發了(le)一(yi)套(tao)高(gao)性(xing)能(neng)數(shu)據(ju)采(cai)(cai)(cai)集(ji)系(xi)統。該(gai)系(xi)統較以(yi)(yi)往開發的(de)數(shu)據(ju)采(cai)(cai)(cai)集(ji)系(xi)統，在設計方案、操作界(jie)面(mian)等方面(mian)均(jun)有了(le)較大(da)改進(jin)，如該(gai)系(xi)統采(cai)(cai)(cai)用PCI總線，傳輸(shu)速(su)(su)率(lv)得以(yi)(yi)大(da)大(da)提高(gao)，系(xi)統軟件運行(xing)于Windows操作系(xi)統下，較以(yi)(yi)往該(gai)領(ling)域的(de)Dos系(xi)統，在操作上更(geng)方便，界(jie)面(mian)更(geng)友好。整個系(xi)統具有高(gao)精度(du)(du)、高(gao)采(cai)(cai)(cai)樣(yang)(yang)速(su)(su)率(lv)以(yi)(yi)及多(duo)通(tong)道且通(tong)道數(shu)可變的(de)突出(chu)特點，本文(wen)介(jie)紹(shao)了(le)該(gai)數(shu)據(ju)采(cai)(cai)(cai)集(ji)系(xi)統的(de)設計與研制方案。
1 系統的總體設計方案
系(xi)統具(ju)體工(gong)作(zuo)要(yao)(yao)求：有(you)62路通(tong)(tong)(tong)道可(ke)(ke)以(yi)(yi)供用(yong)戶(hu)采(cai)集(ji)(ji)(ji)轉換使(shi)用(yong)，具(ju)體采(cai)集(ji)(ji)(ji)1~62路中(zhong)的(de)(de)(de)(de)(de)任意多個通(tong)(tong)(tong)道及這(zhe)些(xie)通(tong)(tong)(tong)道的(de)(de)(de)(de)(de)編號分別(bie)是多少等信息由用(yong)戶(hu)根(gen)據(ju)(ju)需要(yao)(yao)通(tong)(tong)(tong)過上位機傳(chuan)送給(gei)本(ben)(ben)系(xi)統，即本(ben)(ben)系(xi)統要(yao)(yao)根(gen)據(ju)(ju)上位機的(de)(de)(de)(de)(de)具(ju)體信息完成用(yong)戶(hu)的(de)(de)(de)(de)(de)任務；另(ling)外(wai)為(wei)了(le)達到相關指(zhi)標的(de)(de)(de)(de)(de)要(yao)(yao)求，A/D分辨(bian)率應達到14位。從要(yao)(yao)求可(ke)(ke)以(yi)(yi)看出(chu)本(ben)(ben)系(xi)統具(ju)有(you)采(cai)集(ji)(ji)(ji)路數和(he)(he)路號可(ke)(ke)變(bian)、精度高、速(su)度快的(de)(de)(de)(de)(de)突出(chu)特(te)點(dian)。針對(dui)這(zhe)些(xie)特(te)點(dian)，選(xuan)用(yong)凌(ling)華公司(si)的(de)(de)(de)(de)(de)數據(ju)(ju)采(cai)集(ji)(ji)(ji)卡(ka)（DAQ-2010）作(zuo)為(wei)采(cai)集(ji)(ji)(ji)和(he)(he)A/D轉換器件，該板卡(ka)具(ju)有(you)4個14位精度的(de)(de)(de)(de)(de)同步(bu)A/D通(tong)(tong)(tong)道，通(tong)(tong)(tong)過擴展可(ke)(ke)以(yi)(yi)滿足(zu)62通(tong)(tong)(tong)道的(de)(de)(de)(de)(de)要(yao)(yao)求。另(ling)外(wai)，該板卡(ka)的(de)(de)(de)(de)(de)4個獨(du)立A/D的(de)(de)(de)(de)(de)轉換速(su)率可(ke)(ke)達2.2 Mb/s，滿足(zu)了(le)高速(su)采(cai)集(ji)(ji)(ji)的(de)(de)(de)(de)(de)技術要(yao)(yao)求。作(zuo)為(wei)該板卡(ka)工(gong)作(zuo)的(de)(de)(de)(de)(de)控制器，選(xuan)擇使(shi)用(yong)CPLD，因為(wei)CPLD具(ju)有(you)精度高、速(su)度快、穩定性好的(de)(de)(de)(de)(de)特(te)點(dian)，從而可(ke)(ke)以(yi)(yi)滿足(zu)需要(yao)(yao)。本(ben)(ben)系(xi)統與上位機的(de)(de)(de)(de)(de)通(tong)(tong)(tong)信和(he)(he)控制器選(xuan)擇的(de)(de)(de)(de)(de)是8051核(he)單(dan)片機，其開發技術成熟，性能(neng)完全可(ke)(ke)以(yi)(yi)滿足(zu)需求，并且價格(ge)低廉，可(ke)(ke)以(yi)(yi)很好地控制成本(ben)(ben)，它(ta)們的(de)(de)(de)(de)(de)具(ju)體連接框圖如圖1所示。
系(xi)統(tong)工(gong)(gong)作時，首(shou)先由用(yong)戶將(jiang)要(yao)選(xuan)通(tong)(tong)(tong)的(de)(de)具體通(tong)(tong)(tong)道編號(hao)(hao)(hao)和(he)通(tong)(tong)(tong)道數(shu)(shu)目通(tong)(tong)(tong)過工(gong)(gong)控(kong)機(ji)(ji)傳遞給(gei)單(dan)片機(ji)(ji)，單(dan)片機(ji)(ji)將(jiang)各通(tong)(tong)(tong)道編號(hao)(hao)(hao)作為數(shu)(shu)據存放于SRAM中，并(bing)且將(jiang)具體的(de)(de)采(cai)(cai)(cai)(cai)樣(yang)要(yao)求，諸(zhu)如(ru)采(cai)(cai)(cai)(cai)樣(yang)頻率、采(cai)(cai)(cai)(cai)樣(yang)總通(tong)(tong)(tong)道數(shu)(shu)等信(xin)息傳給(gei)CPLD。而后(hou)CPLD獨立(li)輸出SRAM的(de)(de)地(di)址(zhi)來(lai)輪巡所要(yao)采(cai)(cai)(cai)(cai)集的(de)(de)通(tong)(tong)(tong)道。每當一個通(tong)(tong)(tong)道開通(tong)(tong)(tong)，傳感器和(he)電(dian)(dian)(dian)(dian)壓(ya)(ya)端子盒將(jiang)被測(ce)系(xi)統(tong)的(de)(de)電(dian)(dian)(dian)(dian)流(liu)信(xin)號(hao)(hao)(hao)或電(dian)(dian)(dian)(dian)壓(ya)(ya)信(xin)號(hao)(hao)(hao)匯集到信(xin)號(hao)(hao)(hao)控(kong)制(zhi)箱(xiang)，然后(hou)進入信(xin)號(hao)(hao)(hao)調理板和(he)信(xin)號(hao)(hao)(hao)轉(zhuan)換(huan)(huan)電(dian)(dian)(dian)(dian)路，將(jiang)被測(ce)信(xin)號(hao)(hao)(hao)轉(zhuan)換(huan)(huan)為標(biao)準測(ce)量(liang)電(dian)(dian)(dian)(dian)平(ping)后(hou)，通(tong)(tong)(tong)過轉(zhuan)接適配器進入數(shu)(shu)據采(cai)(cai)(cai)(cai)集卡，DAQ-2010數(shu)(shu)據采(cai)(cai)(cai)(cai)集卡就采(cai)(cai)(cai)(cai)集轉(zhuan)換(huan)(huan)一次，并(bing)將(jiang)轉(zhuan)換(huan)(huan)后(hou)的(de)(de)數(shu)(shu)據傳回給(gei)上(shang)位工(gong)(gong)控(kong)機(ji)(ji)。工(gong)(gong)控(kong)機(ji)(ji)對(dui)電(dian)(dian)(dian)(dian)壓(ya)(ya)、電(dian)(dian)(dian)(dian)流(liu)、功率、相(xiang)位等信(xin)號(hao)(hao)(hao)參數(shu)(shu)進行(xing)數(shu)(shu)據分析、計(ji)算(suan)、顯(xian)示和(he)存儲，并(bing)套用(yong)相(xiang)關標(biao)準限制(zhi)曲線圖形，使標(biao)準規定的(de)(de)極限曲線與試驗數(shu)(shu)據填充曲線進行(xing)對(dui)比，以此評估被測(ce)試系(xi)統(tong)設計(ji)的(de)(de)精度和(he)誤差，從而實(shi)現對(dui)被測(ce)系(xi)統(tong)的(de)(de)實(shi)時監(jian)控(kong)。
2 系統的硬件設計
系統硬件(jian)的(de)設計(ji)主要是圍繞DAQ-2010數據(ju)采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)卡進行的(de)，諸如將數據(ju)采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)卡的(de)4個同(tong)步采(cai)(cai)(cai)樣(yang)通道擴展為(wei)62通道，利用(yong)硬件(jian)描述語言開發CPLD，使其能夠完成對(dui)62通道的(de)輪巡以及總線隔(ge)離等功能。針對(dui)系統各通道要采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)的(de)電壓(ya)、電流信(xin)號(hao)的(de)不(bu)同(tong)，采(cai)(cai)(cai)用(yong)多種(zhong)電壓(ya)、電流傳感器(qi)將原始(shi)信(xin)號(hao)轉換成數據(ju)采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)卡可(ke)以采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)的(de)統一(yi)形式的(de)電信(xin)號(hao)，這樣(yang)就可(ke)以為(wei)數據(ju)采(cai)(cai)(cai)集(ji)(ji)(ji)(ji)(ji)、信(xin)號(hao)處理打(da)下(xia)有利的(de)基(ji)礎。硬件(jian)總體框(kuang)圖如圖2所示。
2.1 通道擴展的實現
如前所(suo)述，本系統設計(ji)需要(yao)62個通道供用戶使(shi)用，但DAQ-2010僅有4個獨立同(tong)步A/D通道，于是采用4個16通道多(duo)路(lu)開關進行擴展，從(cong)而(er)可(ke)以(yi)構(gou)造出64個通道可(ke)供使(shi)用，既滿足了用戶的要(yao)求，又(you)可(ke)以(yi)留有兩個通道作(zuo)為應急或系統升級(ji)使(shi)用。
2.2 通道輪巡的實現
將(jiang)通(tong)(tong)(tong)道(dao)擴展至62之后，如何選(xuan)通(tong)(tong)(tong)通(tong)(tong)(tong)道(dao)這(zhe)一任務的完成(cheng)(cheng)是(shi)通(tong)(tong)(tong)過(guo)對(dui)SRAM的數(shu)據進行讀取(qu)實(shi)(shi)現的。具(ju)體思想是(shi)在(zai)系統開始工(gong)作(zuo)時，用戶根據自己的需求將(jiang)需要(yao)測試的通(tong)(tong)(tong)道(dao)編號(hao)通(tong)(tong)(tong)過(guo)工(gong)控(kong)機(ji)(ji)(ji)傳(chuan)遞給單(dan)片(pian)機(ji)(ji)(ji)，而后由單(dan)片(pian)機(ji)(ji)(ji)將(jiang)通(tong)(tong)(tong)道(dao)編號(hao)作(zuo)為(wei)(wei)數(shu)據寫入靜態存儲器(qi)SRAM中(zhong)(zhong)，開始進行數(shu)據采集時，CPLD在(zai)內部時鐘的控(kong)制下(xia)讀取(qu)SRAM中(zhong)(zhong)的數(shu)據（即(ji)通(tong)(tong)(tong)道(dao)編號(hao)），這(zhe)些編號(hao)就成(cheng)(cheng)為(wei)(wei)了多路開關(guan)的選(xuan)通(tong)(tong)(tong)信號(hao)，隨即(ji)實(shi)(shi)現了相應(ying)多路開關(guan)通(tong)(tong)(tong)道(dao)的開通(tong)(tong)(tong)，這(zhe)樣就完成(cheng)(cheng)了對(dui)所需通(tong)(tong)(tong)道(dao)的輪巡，其實(shi)(shi)現框圖如圖3所示。
2.3 CPLD程序設計
CPLD程(cheng)序設計的任務是：
(1)接收(shou)單片機對系統工作要(yao)求的信息(xi)：如用戶需要(yao)輪(lun)巡的通(tong)道(dao)數、分頻(pin)數、復位信號(hao)等。
(2)對多路開關進行(xing)輪(lun)(lun)巡(xun)時，自(zi)動產生(sheng)所(suo)要讀取(qu)SRAM的選通信號(hao)以(yi)及它的地址(zhi)信號(hao)，并根據時序要求實現(xian)輪(lun)(lun)巡(xun)。
(3)接收系(xi)統工作時鐘(zhong)，并且根據要求實現對系(xi)統時鐘(zhong)的(de)分頻(pin)。
另(ling)外值的(de)(de)一提(ti)的(de)(de)是(shi)，系統在(zai)工作(zuo)時(shi)分(fen)為(wei)單片機向SRAM寫數據(ju)(ju)并驗證和CPLD讀(du)取SRAM中的(de)(de)數據(ju)(ju)兩個步(bu)驟，而(er)從單片機和CPLD引出的(de)(de)SRAM選(xuan)通、讀(du)取、地(di)址(zhi)等控制或數據(ju)(ju)線都(dou)要(yao)與SRAM連接，這樣就需(xu)要(yao)有隔(ge)離措施，使得(de)在(zai)前(qian)一個步(bu)驟時(shi)，CPLD與SRAM間(jian)(jian)是(shi)高阻態，而(er)當第二個步(bu)驟時(shi)，單片機與SRAM間(jian)(jian)處于(yu)高阻態。由于(yu)在(zai)硬件(jian)方面，為(wei)了控制PCB板的(de)(de)規格(ge)，所以CPLD與SRAM間(jian)(jian)的(de)(de)隔(ge)離需(xu)要(yao)編程實現。
系統(tong)中最重要的(de)(de)(de)(de)時(shi)序是CPLD的(de)(de)(de)(de)工(gong)(gong)作時(shi)序，CPLD能否正常工(gong)(gong)作是整個系統(tong)的(de)(de)(de)(de)關鍵，要保證CPLD的(de)(de)(de)(de)工(gong)(gong)作時(shi)序清晰，不會產生(sheng)混亂。CPLD選用EPM7128，使用Verilog HDL語言在MAX+PLUSⅡ環境下進行開發(fa)， CPLD的(de)(de)(de)(de)頂層(ceng)程(cheng)序設計模塊見圖(tu)(tu)4。框圖(tu)(tu)左側均為CPLD的(de)(de)(de)(de)輸入管(guan)腳，包括時(shi)鐘、控制讀、寫(xie)選通等信號(hao)(hao)，框圖(tu)(tu)右側均為CPLD的(de)(de)(de)(de)輸出管(guan)腳，包括對SRAM的(de)(de)(de)(de)讀信號(hao)(hao)和地址信號(hao)(hao)，其中SRAM1O、SRAM2O、SRAM3O、SRAMO、SRAM_RD等信號(hao)(hao)可(ke)以在單片(pian)機寫(xie)SRAM時(shi)實現CPLD與SRAM的(de)(de)(de)(de)隔(ge)離。
正常工作(zuo)時(shi)，系統的時(shi)序圖如(ru)圖5所示。
3 測試系統的軟件設計
測(ce)試(shi)系(xi)統(tong)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)使用(yong)VC++開發，運行于Windows環(huan)境下，人機界(jie)面友好，包括系(xi)統(tong)測(ce)試(shi)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)和和系(xi)統(tong)校準(zhun)(zhun)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)。其中系(xi)統(tong)測(ce)試(shi)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)是在對(dui)被測(ce)系(xi)統(tong)進(jin)行測(ce)試(shi)時(shi)，具體(ti)實現(xian)對(dui)電壓、電流、相位(wei)、功率(lv)、功率(lv)因數(shu)等(deng)參數(shu)的(de)穩(wen)態和瞬態進(jin)行數(shu)據(ju)(ju)測(ce)試(shi)、數(shu)據(ju)(ju)分析和數(shu)據(ju)(ju)存(cun)儲(chu)的(de)執(zhi)行軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)，系(xi)統(tong)校準(zhun)(zhun)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)是對(dui)系(xi)統(tong)的(de)精度進(jin)行計量的(de)軟(ruan)(ruan)(ruan)件(jian)(jian)(jian)(jian)。
該軟(ruan)件(jian)包采用(yong)中(zhong)文下拉菜單方式提示操作(zuo)、顯示、打印，自動記錄和(he)存儲所(suo)有測試(shi)數據，以(yi)(yi)便于(yu)事后調出(chu)查詢，觀察分析(xi)，重新(xin)顯示輸(shu)出(chu)。測試(shi)數據套用(yong)相關標準限制曲線圖(tu)形，標準規定的極限曲線與試(shi)驗(yan)數據填充曲線的對比圖(tu)形可同時(shi)顯示打印，以(yi)(yi)便于(yu)判斷(duan)測試(shi)結(jie)果(guo)是否(fou)滿足設計要求(qiu)。
4 結束語
本(ben)系(xi)(xi)(xi)統(tong)(tong)已經(jing)投入實際應(ying)用，經(jing)過實踐(jian)證明(ming)這一(yi)系(xi)(xi)(xi)統(tong)(tong)完全滿足多(duo)通道同(tong)時采樣(yang)并(bing)且(qie)速(su)度快、精度高(gao)的要求，穩(wen)定可(ke)(ke)靠，取得了(le)很好的效果，說明(ming)了(le)文章(zhang)中所作的分析和(he)(he)討論是合理和(he)(he)實用的。本(ben)系(xi)(xi)(xi)統(tong)(tong)可(ke)(ke)應(ying)用于高(gao)速(su)、多(duo)通道且(qie)通道路數(shu)可(ke)(ke)變的工程應(ying)用領(ling)域(yu)。
